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- Xilinx is seeking a talented, self-driven and motivated software engineer to join its RTL Synthesis software development team in Hyderabad. The candidate will be responsible for design and development of synthesis features and optimizations in Xilinx's current and next generation software tools. We are looking for smart, creative people who have a passion for solving complex problems.
- The ideal candidate has a strong background in algorithms, data structures, and SW engineering, with strong foundations in C++, boost / STL and strong coding practices. Experience in logic synthesis, high-level synthesis, or RTL front-end development is preferred. The candidate should have a solid understanding of SW quality and processes.
- Xilinx is the world's leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration. Our All Programmable devices underpin today's most advanced electronics. Among the broad range of end markets we serve are:
- Aerospace/Defense
- Automotive
- Broadcast
- Consumer
- High Performance Computing
- Industrial / Scientific / Medical (ISM)
- Wired
- Wireless
Required :
- BS or MS in CS, EE or CE with 1+ years of software development experience
- Background in EDA tools development preferred
- Strong background in computer algorithms and data structures.
- Strong background in C++ programming including boost and STL
- Familiarity with parts of the VLSI Implementation or Verification flow.
- Familiarity with Verilog or VHDL.
- Excellent problem-solving skills and willingness to think outside the box
- Experience with production software quality assurance practices, methodologies, and procedures
- Excellent communication skills and experience working with global teams
Preferred Exposure to any of these areas :
- Compilers, RTL front-end development
- RTL Synthesis algorithms, datapath or high-level synthesis
- Timing/area/power optimizations
- Technology mapping
- Static timing analysis
- Simulation, Formal Verification or Design For Test
- Exposure to FPGAs and FPGA software toolchain.
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